A well known and prevalently used power semiconductor device is a power MOSFET. FIG. 1 shows a cross-sectional view of a portion of the active region of a power MOSFET according to prior art. The device illustrated by FIG. 1 is of the trench variety. A trench type power MOSFET includes vertical gate structures.
FIG. 2 shows the cross-sectional view of a portion of the active region of a prior art power MOSFET. The device illustrated by FIG. 2 is a planar type device. Such devices include horizontally oriented gate structures.
Referring now to both FIGS. 1 and 2, each device includes source regions 10 each formed in a channel region 12. Gate structures are formed adjacent source regions 10 and the channel region 12 in which the source regions 10 are formed. Each gate structure includes a gate electrode 14, which is typically formed from a conductive polysilicon, and a gate insulation layer 16 which is typically comprised of silicon dioxide. Each gate insulation layer 16 insulates its associated gate electrode 14 from an adjacent channel region 12.
As is well known in the art, in a vertical conduction type MOSFET, channel region 12 is disposed adjacent to drain region 18. Drain region 18 and source regions 10 are of one conductivity while channel region 12 is of the opposite conductivity. Thus, under a range of applied voltages, source regions 10 and drain region 18 are insulated from one another by channel region 12. When an appropriate voltage is applied to a gate electrode 14 a region (invertible channel region or channel) in channel region 12 adjacent its associated gate insulation layer 16 changes conductivity through what is referred to as inversion. As a result, source regions 10 and drain region 18 become electrically connected. Thus, current can be conducted when a voltage is applied between source regions 10 and drain region 18.
In a typical power MOSFET, drain region 18 is epitaxially formed over a semiconductor substrate 20 of the same conductivity, but of a higher concentration of dopants. To allow for external electrical connection drain contact 22 may be electrically connected to substrate 20, and source contact 24 may be electrically connected to source regions 10. It is also well known to connect source contact 24 to a high conductivity contact region 26 of the same conductivity as channel region 12 in order to suppress the possibility of formation of parasitic devices.
FIGS. 1 and 2 show an N channel device in which source regions 10 and drain region 18 have N type conductivity, while channel region 12 has P type conductivity. These conductivity types may be reversed in order to obtain a P channel device.
In a power MOSFET, it is desirable to reduce the resistance of the device during conduction (Rdson). Rdson is primarily determined by the resistance of the channel and the resistance of drain region 18 (sometimes referred to as drift region). The resistivity of the drift region is determined by the resistivity and thickness of the epitaxial layer, and is proportional to the breakdown voltage rating of the device. The breakdown voltage rating of the device indicates the ability of the device to withstand breakdown under reverse voltage conditions. Thus, to reduce Rdson the conductivity of the epitaxial layer can be increased, which adversely affects the breakdown voltage rating of the device. Conversely, to improve the breakdown voltage rating the conductivity of the epitaxial layer can be reduced, which increases Rdson. The inverse relationship between Rdson and breakdown voltage rating often forces designers to settle for less than ideal values for the Rdson and the breakdown voltage rating of a device.
A superjunction structure allows the designers to decrease the Rdson of a device without adversely affecting its breakdown voltage. A superjunction device includes alternating P and N type regions below the active cells of the device. The alternating P and N type regions are in substantial charge balance so that under a reverse voltage condition these regions deplete one another thereby allowing the device to withstand breakdown. Thus, a superjunction arrangement allows for an increase in the conductivity of the drain region to improve the Rdson without an effect on the breakdown voltage rating of the device.
FIG. 2 shows a device that includes a superjunction type arrangement. Specifically, FIG. 2 shows a planar type power MOSFET which includes regions 28 of conductivity opposite to that of drain region 18. Regions 28 are in substantial charge balance with drain region 18 in order to form a superjunction.
In a superjunction device of a proven given breakdown voltage, it is known that Rdson per unit area is reduced as the width (Wp) of regions 28 and drain region 18 is reduced. Thus, for a device such as the one shown in FIG. 2, it is desirable to reduce the pitch (the cell to cell spacing defined by the distance between the center of adjacent gate electrodes in FIG. 2 or trenches in FIG. 1).
In the device shown by FIG. 2, regions 28 may be formed by forming multiple layers of epitaxial silicon 18′. A portion of a region 28 is then formed in each epitaxial layer by, for example, implantation followed by a diffusion drive step, before the formation of the next epitaxial layer. A final diffusion drive step can then be applied to join the separated implants in the vertical direction. Such a process is typically used to form high voltage devices because the long diffusion allows for wide (>4 um) regions 28. The wide regions 28 are not suitable for lower voltage devices and are not capable of achieving an acceptably low Rdson.
Referring to FIG. 3, regions 28 can also be formed by multiple high energy implants below channel regions 12. For example, regions 28 may be formed by a series of high energy implants through the source contact opening during the manufacturing of the device. Such a process allows for narrow, well controlled widths for regions 28 W(p) and its adjacent drain region 18 W(n) and fewer epitaxial growth steps. A device shown by FIG. 3 can exhibit a high breakdown voltage and a low Rdson.
To obtain a device according to FIG. 3, however, the high energy implants must be effectively blocked from reaching the area under the trenches that contain the gate structures. The blocking step introduces manufacturing complexities, and does not allow narrow pitch devices with a spacer-defined contact to be manufactured.
Other methods have also been suggested for forming the prior art devices. For example, it has been suggested that a region 28 in the device of FIG. 2 can be formed by etching a groove and filling the same with p-type material through, for example, epitaxial deposition. Such a process, however, involves a complicated deep trench etch process, which cannot create the narrow pitch device that is desired. The epitaxial growth process in the trench also introduces defects and can possibly compromise the reliability of the device.
Another suggested method is forming a region 28 through selective neutron transmutation doping. This process, however, is not commonly used or available for power MOSFET fabrication.
Yet another suggested method involves forming a deep trench, doping the sidewalls of the trench to form regions 28, and then filling the trench with a dielectric material. This process can possibly provide narrow pitch devices, but still requires deep trenches to be etched in the silicon, and the sidewalls to be doped in a defined manner. It is doubtful that this doping can be controlled well.
To reduce the pitch of a cell in a trench type MOSFET, Darwish in U.S. Pat. No. 6,084,264, and U.S. Publication No. 2003/0006454 suggests forming drain regions below the trenches that contain the gate structure. In the device suggested by Darwish each trench is formed in an epitaxial layer of opposite conductivity that is formed directly over a substrate of the same conductivity as the drain region. Each drain region in a device suggested by Darwish is formed by a single implant step through the bottom of a trench followed by a diffusion drive so that the implanted region can expand to reach at least the bottom of the trench and the substrate, thereby forming a drain region below the trench.
The device suggested by Darwish suffers from certain drawbacks. First, forming an epitaxial layer of the opposite conductivity directly on a substrate may limit the breakdown voltage because the depth of a drain region that can be achieved using the process proposed by Darwish may not be enough to withstand higher voltages. Furthermore, because the drain regions are formed by a single implant step followed by a diffusion drive, the width of the drain regions cannot be narrowed in a well controlled manner. In addition, because one implant step is used, the width of the trenches, through which drain implants are received, must be increased in order to allow for forming implant regions of sufficient initial width from which drain regions extending from the bottom of the trench to the substrate may be formed. Undesirably, increasing the width of the trenches results in the increase of the pitch of the cells.
It is, therefore, desirable to have a device which is not restricted by the limitations of the prior art.